SEOUL -- Samsung Electro-Mechanics, an electric component maker in South Korea, will invest $851 million to nurture its subsidiary in Vietnam as a production hub for flip-chip ball grid arrays which are mainly used for central processing units (CPUs) and graphic processing units (GPUs) that require high-performance and high-density circuit connections.
Samsung Electro-Mechanics said its board has approved the proposed investment in Samsung Electro-Mechanics Vietnam, saying the subsidiary would focus on producing flip-chip ball grid arrays while its business in South Korea would strengthen customer responsiveness by specializing in technology development and high-end products.
A ball grid array is a type of surface-mount packaging used for integrated circuits. Flip chips are useful for high-frequency applications because the chip rests right on the circuit board.
A flip-chip ball grid array makes use of a controlled collapse chip connection or flip-chip. It works through solder bumps on the top of the chip pads.
Samsung Electro-Mechanics said the new investment is aimed at actively responding to an increase in demand for package substrates and establishing a foundation for preoccupying high value-added product markets. "Demand is increasing as high-performance semiconductor package substrates become important due to the high performance of semiconductors and the expansion of 5G, AI, and cloud," CEO Chang Duck-hyun said in a statement on December 23.
Samsung Electro-Mechanics described a flip-chip ball grid array as the "most difficult" product to manufacture among semiconductor package substrates, as the high-intensity package substrate connects semiconductor chips and main substrates with flip-chip bumps. Flip-chip ball grid arrays are in demand for various applications such as servers and networks.
The role of post-processing in packaging semiconductors is becoming very important in differentiating semiconductor performance, the South Korean company said, adding that the semiconductor industry should be supported by substrate technology that can respond to multi-chip packages and miniaturization that package multiple chips into one.
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